1/29 Wednesday 11 AM to 6 PM
1/30 Thursday 11 AM to 6 PM
Santa Clara ConventionCenter
5001 Great America Pkwy
Santa Clara, CA 95054
We will be presenting a paper at DesignCon.
Date: January 30, Thursday
Time: 2:00 PM to 2:40 PM
Location: Ballroom G
Power Delivery Improvement & Noise Reduction Using Ultra-Thin (8um) PCB Layers: Simulation, Board Measurements & Practice
(Hardware Engineer, Major Technology Company)
(Technical Lead, SI/PI Team, Intel)
(R&D Project Manager, Harmonic Video Networks)
(Vice President of Technology and Business Development, Oak-Mitsui Technologies)
(High Speed System Design, Intel)
This paper examines the use of distributed capacitors based on ultra-thin film PCB laminates (below 0.4 mil) for controlling PDN impedance at the MHz to GHz frequency band of fine pitch BGA design. Ultra-thin PCB material has inherent capacitance properties, presenting an elegant wide band decoupling solution for PDN, the benefits of which were proven by simulation in previous work. This work demonstrates a practical implementation of this concept. Various alternative ultra thin laminates are examined, while providing a power integrity simulation and corresponding lab measurements and post manufacturing analysis for the leading ones. Additional practical aspects, such as the less explored manufacturability and reliability considerations, required for successful implementation, are discussed.